Commit Graph

14 Commits

Author SHA1 Message Date
JosJuice
36b3d51523 JitArm64: Restructure the BackPatchInfo flags enum
This makes it possible to construct flag combinations like
"load 16 bits into an FPR".
2021-09-08 21:23:00 +02:00
Pierre Bourdon
e149ad4f0a
treewide: convert GPLv2+ license info to SPDX tags
SPDX standardizes how source code conveys its copyright and licensing
information. See https://spdx.github.io/spdx-spec/1-rationale/ . SPDX
tags are adopted in many large projects, including things like the Linux
kernel.
2021-07-05 04:35:56 +02:00
JosJuice
fdf7744a53 JitArm64: Move float conversion code out of EmitBackpatchRoutine
This simplifies some of the following commits. It does require
an extra register, but hey, we have 32 of them.

Something I think would be nice to add to the register cache
in the future is the ability to keep both the single and double
version of a guest register in two different host registers
when that is useful. That way, the extra register we write to
here can be read by a later instruction, saving us from
having to perform the same conversion again.
2021-04-25 15:56:19 +02:00
Pierre Bourdon
3570c7f03a Reformat all the things. Have fun with merge conflicts. 2016-06-24 10:43:46 +02:00
degasus
84395b65f6 JitArm64: Track singles in psq_st. 2016-02-25 19:47:06 +01:00
Ryan Houdek
2c68f6bfc5 [AArch64] Implement Fiora's preemptive paired loadstore optimization.
This provides a decent speed up in pretty much everything that touches pair loadstores because in most cases they are just regular non-quantizing
float loadstores that happen.
2015-09-04 19:20:33 -05:00
Ryan Houdek
ae0a06a018 [AArch64] Implement dcbz instruction 2015-08-31 15:39:47 -05:00
Ryan Houdek
bcde1aa8ff [AArch64] Improve floating point single instructions.
Instead of having an "INS" instruction after every single instruction to duplicate the bottom 64bits in to the top 64bits of the register,
create a new FPR register cache type to track when a register's lower 64bits is supposed to be duplicated in to the high 64bits.
Not necessarily actually having the lower bits duplicated in the host side register. This removes inefficient INS instructions from sequential single
float instructions.
In particular a very heavy single heavy block in Animal Crossing went from 712 instructions down to 520 instructions(~37% less instructions!)
2015-08-31 11:09:17 -05:00
Ryan Houdek
d3176fe22a [AArch64] Implement stfiwx
Improves povray performance by ~4%
2015-08-24 01:10:55 -05:00
Ryan Houdek
df53b37253 [AArch64] Optimize lfd instructions if possible.
If we are going to be using lfd, then chances are it is going to be used in double heavy areas of code.
If we only need to load the lower register, then we should also not worry about having to insert in to the low 64bits of the guest register.
So add a new flag to the backpatching to handle lfd to directly to the destination register.
This gives ~3% performance improvement to Povray.
2015-08-21 04:31:54 -05:00
degasus
715802d5aa JitArm64: Move all pointers into the map
And cleanup all of the old code for sharing and generating this pointers.
2015-08-14 11:24:11 -05:00
Tillmann Karras
cefcb0ace9 Update license headers to GPLv2+ 2015-05-25 13:22:31 +02:00
magumagu
f316265973 Fix the addresses of MMIO registers.
MMIO registers are located at 0x0C000000 and 0x0D000000, not 0xCC000000.
The 0xCC000000 addresses are just an artifact of address translation.
2015-02-15 18:29:37 -08:00
Ryan Houdek
edfbb6ab9a [ARM] Adds a ArmCommon folder.
Moves the backpatch flags and struct to a common location for ARM.
I'm sure there will be more things that use this common ARM location in the future.
2014-12-20 19:36:48 -06:00