Commit Graph

701 Commits

Author SHA1 Message Date
JosJuice
16eb188f1d JitArm64: Implement low DCBZ hack
JitArm64 port of 76228fa.
2022-05-07 15:37:50 +02:00
JosJuice
14f9ffeb02 JitArm64: Add documentation comment for EmitBackpatchRoutine 2022-04-23 11:37:52 +02:00
JosJuice
2ef2d4778d JitArm64: Always lock Q0 in psq_stXX
Q0 is used as a scratch register by EmitBackpatchRoutine.

Fixes a vertex explosion in Spider-Man 2 that was uncovered by 20b2300.
2022-04-16 13:22:36 +02:00
JosJuice
fd511a689f Jit: Skip redundant flushes
This makes codegen faster (by perhaps 10-20% in the case of Jit64,
I didn't measure too closely), which helps speed up NBA Live 2005
a little. But the game still has serious performance issues.
2022-02-14 19:17:59 +01:00
Pokechu22
ce52ea35ec Jit: Replace magic 32 with GPFifo::GATHER_PIPE_SIZE 2022-02-12 16:14:05 -08:00
shuffle2
4ce9944cc5
remove redundant Unlock 2022-01-22 05:58:32 -08:00
Shawn Hoffman
acf6e24586 msvc/arm64: fix shadowed variable warning 2022-01-22 03:31:50 -08:00
Pokechu22
1a92699455 Cast to int for enums that are not formattable 2022-01-13 11:11:08 -08:00
JMC47
c18abfaecc
Merge pull request #10356 from AdmiralCurtiss/config-port-core-4
Config: Port remaining Core settings to new config system (the rest).
2022-01-11 16:08:19 -05:00
Pokechu22
558de04cfc Common/Assert: Actually use the ASSERT_MSG's log type parameter
Since it was unused, nonexistent values were used in a few places.  I've replaced them.
2022-01-09 12:44:14 -08:00
Pokechu22
bab3ff0157 Common/MsgHandler: Remove non-format variants of PanicAlert
They're no longer used.
2022-01-09 12:44:14 -08:00
Pokechu22
161c627466 Treewide: Remove unused inclusions of <cinttypes>
Most of these became unneeded when fmt was introduced.
2022-01-09 12:43:11 -08:00
Pokechu22
44e93e91d7 Common/Assert: Switch to fmt 2022-01-09 12:43:11 -08:00
Admiral H. Curtiss
92d2fd9d5f
Config: Port MMU setting to new config system. 2022-01-09 21:29:12 +01:00
JosJuice
bcd1831339
Merge pull request #9815 from JosJuice/jitarm64-fmaless
JitArm64: Implement FMA-less path for FMA instructions
2022-01-09 19:40:54 +01:00
Admiral H. Curtiss
dc7e7d08ad
Config: Port Fastmem setting to new config system. 2022-01-06 16:13:56 +01:00
Admiral H. Curtiss
e08171fa24
Config: Port remaining Core settings to new config system (partial). 2022-01-05 00:54:15 +01:00
Admiral H. Curtiss
d6331c1e71
Config: Port remaining Interface settings to new config system. 2021-12-31 17:40:04 +01:00
Admiral H. Curtiss
810dcfa0f6
Config: Port Debug settings to new config system. 2021-12-30 22:28:05 +01:00
Markus Wick
80ccb20931
Merge pull request #10267 from JosJuice/jitarm64-bigger-farcode
JitArm64: Allocate 64 MB for farcode
2021-12-16 19:23:31 +01:00
Pokechu22
2025763420 Treewide: Adjust order of includes 2021-12-10 14:49:57 -08:00
JosJuice
67787b59d6 JitArm64: Allocate 64 MB for farcode
My change in 867cd99 caused farcode to fill up much more than before.
Most games still ran fine, but certain games would have multiple
cache clears per minute, on top of being overall slow.

Maybe there's something prettier we can do about this than just
allocating more RAM, but we have the resource budget for making
Dolphin use more RAM, so I consider increasing the size of the
cache to be a good solution at least for the time being.

At least for Prince of Persia: The Forgotten Sands, 48 MB isn't
enough to stop the cache clears, but 64 MB is. (I only played the
game for a few minutes when testing, though.)
2021-12-08 20:56:00 +01:00
JosJuice
83d2d55aab JitArm64: Fix incorrect push size calculation 2021-11-24 22:39:54 +01:00
JosJuice
5490797867 JitArm64: Implement memcheck for psq_lXX/psq_stXX with update 2021-11-20 23:39:27 +01:00
JosJuice
61c73061e9 JitArm64: Implement memcheck for psq_lXX/psq_stXX without update 2021-11-20 23:39:27 +01:00
JosJuice
9e43796912 JitArm64: Allow passing temp FPR to EmitMemcheck
Small optimization. If the caller already has an FPR that
it isn't using, might as well pass it on to fpr.Flush.
2021-11-20 23:39:27 +01:00
JosJuice
89301b1f91 JitArm64: Implement memcheck for lfXX/stfXX with update 2021-11-20 23:39:27 +01:00
JosJuice
8c96e60cd1 JitArm64: Implement memcheck for lfXX/stfXX without update 2021-11-20 23:39:27 +01:00
JosJuice
1c8ddcdda1 JitArm64: Implement memcheck for dcbz 2021-11-20 23:39:27 +01:00
JosJuice
4fe15e788f JitArm64: Implement memcheck for lmw/stmw 2021-11-20 23:39:27 +01:00
JosJuice
b4ffdce800 JitArm64: Implement memcheck for lXX/stX with update 2021-11-20 23:39:27 +01:00
JosJuice
662ae570a0 JitArm64: Make EmitBackpatchRoutine support saving W0
Being able to preserve the address register is useful for the
next commit, and W0 is the address register used for loads. Saving
the address register used for stores, W1, was already supported.
2021-11-20 23:39:27 +01:00
JosJuice
e316d0e94f JitArm64: Don't update dest reg when load triggers exception, part 2
If a host register has been newly allocated for the destination
guest register, and the load triggers an exception, we must make
sure to not write the old value in the host register into ppcState.
This commit achieves this by not marking the register as dirty
until after the load is done.
2021-11-20 23:39:26 +01:00
JosJuice
96190887ce JitArm64: Don't update dest reg when load triggers exception
Fixes a problem introduced in the previous commit.
2021-11-20 23:39:26 +01:00
JosJuice
ab1ceee16f JitArm64: Implement memcheck for lXX/stX without update 2021-11-20 23:39:26 +01:00
JosJuice
8c905e152a JitArm64: Make WriteConditionalExceptionExit more flexible
You can now specify an already allocated register for it to use as a
temporary register, and it also supports being called while in farcode.
2021-11-20 23:37:02 +01:00
JMC47
e5a4a86672
Merge pull request #10055 from JosJuice/jitarm64-reuse-memory
JitArm64: Codegen space reuse
2021-11-20 17:35:24 -05:00
Shawn Hoffman
58dc9e7049 msvc: fix compile warning on arm64 2021-11-11 08:01:39 -08:00
Merry
9c75957319 JitArm64_FloatingPoint: Implement fctiwx in ARM64 JIT
We implement this by first rounding to nearest integer using the current
rouding mode, then converting this value from floating point to an integral
value.
2021-11-06 20:54:26 +00:00
JosJuice
7c88ca7c4e JitArm64: Work around a GCC warning promoted to error
GCC complains about float_emit being null when inlining
ByteswapAfterLoad into MMIOLoadToReg. ByteswapAfterLoad
does dereference float_emit, but only when passing FLAG_FLOAT,
which MMIOLoadToReg has an assert for and does not support.

Also cleaning up some unnecessarily specified namespaces while
I'm at it.
2021-10-15 21:32:46 +02:00
JosJuice
2d1674cd56 JitArm64: Keep track of free code regions and reuse space when possible
JitArm64 port of 306a5e6.
2021-10-13 21:52:16 +02:00
JosJuice
44beaeaff5 Arm64Emitter: Check end of allocated space when emitting code
JitArm64 port of 5b52b3e.
2021-10-13 21:52:16 +02:00
JosJuice
867cd99de1 JitArm64: Remove the ability to reuse backpatch slowmem handlers
Reusing the slowmem handlers of existing blocks meshes badly
with reusing the empty space left when destroying blocks.
I don't think reusing slowmem handlers was much of a gain anyway.
2021-10-13 21:51:45 +02:00
JosJuice
9f525d69c8 Jit: Raise program exception on floating point exceptions
This is done entirely through interpreter fallbacks. It would
probably be possible to implement this using host exception
handlers instead, but I think it would be a lot of complexity
for a rarely used feature, so let's not do it for now.

For performance reasons, there are two settings for this feature:
One setting which does enables just what True Crime: New York City
needs and one setting which enables it all. The latter makes
almost all float instructions fall back to the interpreter.
2021-10-13 17:42:56 +02:00
JosJuice
c3bcc67653 PowerPC: Update FEX on FPSCR store instead of FPSCR load
This is needed not only for the next commit, but also for
correctly emulating float instructions that write to CR1.
2021-10-13 17:42:56 +02:00
JosJuice
83c6df1965 PowerPC: Set SRR1 correctly for program exceptions 2021-10-13 17:42:56 +02:00
JosJuice
26322a54cf JitArm64: Consistently set emitting_routine
Important regression fix for 96760093e9.
2021-10-12 18:55:06 +02:00
JMC47
3bfb3fa52b
Merge pull request #9884 from JosJuice/jitarm64-paired-loadstore-addr
JitArm64: Improve psq_l/psq_st address checking
2021-10-11 16:49:26 -04:00
Léo Lam
6129290d31
Merge pull request #10057 from JosJuice/jitarm64-divwx
JitArm64: Optimize divwx
2021-09-20 15:37:57 +02:00
JosJuice
74f2acd83b JitArm64: Move fresx/frsqrtex RW calls earlier
If W0 is locked when fpr.RW is called, the indirectly called
ConvertSingleToDoubleLower may need to emit a push+pop, so it's
better for fresx/frsqrtex to call RW before locking W0 than after.
2021-09-13 19:27:16 +02:00