Previously, PowerPC.h had four macros in it like so:
\#define rPS0(i) (*(double*)(&PowerPC::ppcState.ps[i][0]))
\#define rPS1(i) (*(double*)(&PowerPC::ppcState.ps[i][1]))
\#define riPS0(i) (*(u64*)(&PowerPC::ppcState.ps[i][0]))
\#define riPS1(i) (*(u64*)(&PowerPC::ppcState.ps[i][1]))
Casting between object representations like this is undefined behavior.
Given this is used heavily with the interpreter (that is, the most
accurate, but slowest CPU backend), we don't exactly want to allow
undefined behavior to creep into it.
Instead, this adds a helper struct for operating with the paired singles,
and replaces the four macros with a single macro for accessing the
paired-singles/floating-point registers.
This way, it's left up to the caller to explicitly decide how it wants to interpret
the data (and makes it more obvious where different interpretations of
the same data are occurring at, as there'll be a call to one of the
[x]AsDouble() functions).
These bits enable or disable paired-single execution based on how
they're set. If PSE isn't set, then all paired-single instructions are
illegal. If PSE is set, but LSQE isn't set, then psq_l, psq_lu, psq_st
and psq_stu are illegal to execute.
Also thanks go out to my roommate @Veegie for letting me use his Wii as
a blasting ground for tests, since mine isn't on hand right now. It only
caught on fire twice and only burned down half of the house through the
process; what a team player.
And use it for reporting games that rely on ICache emulation to some
degree. We know of a few but it would be interesting to get a more
exhaustive list from crowdsourcing.
This was an erronous change in 534db3b, Ra was previously loaded but was changed to not being loaded.
Why is loading necessary? Loading is necessary because when a memory exception occurs, the current
register values are flushed. This occurs before a new value is loaded into Ra, so the previous value
is required in Ra.
